Compiler Optimizations for High Performance Architectures
نویسندگان
چکیده
We describe two ongoing compiler projects for high performance architectures at the University of Maryland being developed using the Stanford SUIF compiler infrastructure. First, we are investigating the impact of compilation techniques for eliminating synchronization overhead in compiler-parallelized programs running on software distributed-shared-memory (DSM) systems. Second, we are evaluating data layout transformations to improve cache performance on uniprocessors by eliminating conflict misses through interand intra-variable padding. Our optimizations have been implemented in SUIF and tested on a number of programs. Preliminary results are encouraging.
منابع مشابه
Compiler Optimizations for Low Power Systems
Most current compiler optimizations focus on improving execution time. With the increasingly widespread use of embedded systems, however, power/energy consumption is also becoming an important issue. This is particularly true for battery-operated devices where power consumption has first class status along with performance and form factor. This paper makes the following contributions. First, we...
متن کاملClassification of Compiler Optimizations for High Performance, Small Area and Low Power in FPGAs
We propose a classification of high and low-level compiler optimizations to reduce the clock period, power consumption and area requirements in Field-programmable Gate Array (FPGA) architectures. The potential of each optimization, its effect on clock period, power and area and machine dependency is explained in detail.
متن کاملImpact of JIT/JVM Optimizations on Java Application Performance
With the promise of machine independence and efficient portability, JAVA has gained widespread popularity in the industry. Along with this promise comes the need for designing an efficient runtime environment that can provide high-end performance for Java-based applications. In other words, the performance of Java applications depends heavily on the design and optimization of the Java Virtual M...
متن کاملEvaluating Performance Portability of OpenACC
Accelerator-based heterogeneous computing is gaining momentum in High Performance Computing arena. However, the increased complexity of the accelerator architectures demands more generic, highlevel programming models. OpenACC is one such attempt to tackle the problem. While the abstraction endowed by OpenACC offers productivity, it raises questions on its portability. This paper evaluates the p...
متن کاملA PTX Code Generator for LLVM
Today’s GPGPU architectures and corresponding high level programming languages like CUDA replace the traditionally restricted GPU pipelines. Proprietary compilers allow to translate these languages into native GPU assembly. Unfortunately, these compilers are non-customizable and restricted to static compilation. High performant application currently require particular manual optimizations. To o...
متن کامل